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C with make
Makefile
helloword: helloword.c gcc -o hellword hellword.c -I.
Then run:
$ make helloword
Here is an example of a typical C project Makefile, copied from thisarticle.
-
Makefile
```make # Usage: # make # compile all binary # make clean # remove ALL binaries and objects.PHONY = all clean
CC = gcc # compiler to use
LINKERFLAG = -lm
SRCS := foo.c BINS := foo
all: foo
foo: foo.o @echo “Checking..” gcc -lm foo.o -o foo
foo.o: foo.c @echo “Creating object..” gcc -c foo.c
clean: @echo “Cleaning up…” rm -rvf foo.o foo